Library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity magnitude_comparator_4_bit is
port (
A: in std_logic_vector(3 downto 0);
B: in std_logic_vector(3 downto 0);
greater, equal, smaller : out std_logic
);
end magnitude_comparator_4_bit ;
architecture bhv of magnitude_comparator_4_bit is
begin
greater <= '1' when (A > B)
else '0';
equal <= '1' when (A = B)
else '0';
smaller <= '1' when (A < B)
else '0';
end bhv;